Abstract
Heterogeneous multicore systems, such as the ARM big.LITTLE, feature a single instruction set with di erent types of processors to conciliate high performance with low energy consumption. An important question concerning such systems is how to determine the best hardware con guration for a particular program execution. e hardware con guration consists of the type and the frequency of the processors that the program can use at runtime. Current solutions are either completely dynamic, e.g., based on in-vivo pro ling, or completely static, based on supervised machine learning approaches. Whereas the former solution might bring unwanted runtime overhead, the la er fails to account for the diversity in program inputs. In this paper, we show how to circumvent this last shortcoming. To this end, we provide a suite of code transformation techniques that perform numeric regression on function arguments, which can have either scalar or aggregate types, so as to match parameters with ideal hardware con gurations at runtime. We have designed and implemented our approach on top of the Soot compilation infrastructure, and have applied it onto programs available in the PBBS and Renaissance suites. We show that we can consistently predict the best con guration for a large class of programs running on an Odroid XU4 board, outperforming other techniques such as ARM's GTS or CHOAMP, a recently released static program scheduler.