Résumé
The increase of within-die variations and the design margin growth are creating a need for statistical design methodologies. This paper proposes a simple statistical timing analysis method considering the lot to lot process shifts that occur during production. This method is validated for 90nm and 65nm process. Finally, this statistical timing analysis is applied to evaluate, on basic ring oscillators and combinational paths, the timing margins introduced at the design level by the traditional corner based approach.