Abstract
Motivated by the growing requirements in performances which the current architectures will not soon be able any more to face, this article presents a new approach for the design of digital signal processing IC. Having expressed the problem, we underline the respective limitations of the classic structures such as processors and FPGA, and we present hybrid architecture of these two families presenting a level of unprecedented performances. We detail the principles of dynamical reconfiguration on which our architecture is based, then present comparative results on a well known multimedia applications algorithm (DCT algorithm). Finally we describe the results obtained by fast prototyping and the current works concerning the problems of compilation targeting of our architecture.