Study of an SOI SRAM sensitivity to SEU by 3-D device Simulation

K. Castellani-Coulié; B. Sagnes; Frédéric Saigné; J.-M. Palau; M.-C. Calvet; P.E. Dodd; F.W. Sexton

doi:10.1109/TNS.2004.835076

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Study of an SOI SRAM sensitivity to SEU by 3-D device Simulation

Journal article

Peer reviewed

Study of an SOI SRAM sensitivity to SEU by 3-D device Simulation

K. Castellani-Coulié, B. Sagnes, Frédéric Saigné, J.-M. Palau, M.-C. Calvet, P.E. Dodd and F.W. Sexton

IEEE Transactions on Nuclear Science, Vol.51(5), pp.2799 - 2804

10/2004

DOI: https://doi.org/10.1109/TNS.2004.835076

Abstract

Silicon on insulator static random-access memory cell sensitivity to single event upset is studied. Currents and sensitive regions are then considered. Because of the buried oxide, the main part of these results appears to be different to that for bulk technologies.

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Title: Study of an SOI SRAM sensitivity to SEU by 3-D device Simulation
Creators - without role: K. Castellani-Coulié - Aix-Marseille Université
B. Sagnes - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
Frédéric Saigné - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
J.-M. Palau - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
M.-C. Calvet
P.E. Dodd - Sandia National Laboratories California
F.W. Sexton - Sandia National Laboratories California
Publication Details: IEEE Transactions on Nuclear Science, Vol.51(5), pp.2799 - 2804
Identifiers: 9944048009311
Academic Unit: Université de Montpellier
Language: English
Resource Type: Journal article
Local Fields: hal-00327728