Abstract
The mechanisms responsible for neutron-induced single-event burnout (SEB) in commercial silicon carbide power MOSFETs under atmospheric-like neutron spectrum were investigated and analyzed. The combined effect of applied reverse gate voltage and drain voltage was evaluated. First, local analysis of the packaged device at the wafer level is performed to reveal the failure mechanism inside the semiconductor lattice. Second, based on gate stress testing of surviving devices and looking at the influence of reverse gate bias during irradiation, an enhanced failure sensitivity especially for drain voltage values close to the safe operating area was demonstrated. In addition to support this assumption, TCAD simulations with damage sites were performed in order to address physical mechanisms related to gate leakage degradation and SEB.