Abstract
Porous low-k materials used as insulator for interconnection levels in CMOS devices, are easily damaged during the patterning processes. Pore size characterization after material damage is challenging due to the chemical modification induced by the applied process. Numerical simulation of solvent adsorption on silica and functionalized silica surfaces was used to improve material pore size determination by ellipso-porosimetry, taking into account the modifications of surface/solvent interactions.