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High-Performance Hardware Operators for Polynomial Evaluation
Article de revue   Open Access   Avec comité de lecture

High-Performance Hardware Operators for Polynomial Evaluation

Arnaud Tisserand
International Journal of High Performance Systems Architecture (IJHPSA), Vol.1(1), pp.14-23
2007

Résumé

Arithmetic Operator Hardware Operator Function Approximation Polynomial Evaluation Polynomial Coefficient Approximation Error Rounding Error
This paper presents some recent works on hardware evaluation of functions. A method for the automatic generation of high-performance arithmetic operators based on polynomial approximations is described. It deals with the bit-level representation of the polynomial coefficients, the intermediate computations width, the approximation and the rounding errors. The generated operators are small, fast and numerically validated at design time. Some examples have been implemented on FPGAs.

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