Abstract
Nowadays, more and more microelectronic circuits are used for critical purposes, such as payment or identification. Then those circuit sparked interest form attackers. Among the different ways to retrieve the cipher key, laser illumination is a very efficient one. Thereby, the protection of the circuit against these attacks becomes an important point for designers. However, to determine the resistance of a circuit against laser injection, laser illumination has to be performed. If the circuit do not match the security requirement, it has to be changed, which represent a large cost in terms of design time and fabrication cost. In order to predict the effect of a laser injection, electrical model and simulator have been developed.First, a description of the physical phenomenon (photoelectric effect), which leads to the fault injection in the circuit, is given. Then a description of the first electrical model developed using current sources to model the illumination effect.Then, a practical attack is performed on a crypto processor implanting the AES algorithm. This experimentation allows us to compare the two ways of laser injections, injection from the front side or the back side of the circuit. It comes out that the best way of injection depends on the circuit aimed and the laser bench at disposal of the attacker. Indeed, on the studied circuit, better exploitable fault can be injected, from the front side injection with a large laser spot than from the back side with the same laser spot size. This result can be explained by the effect of the metal lines above the circuit, which reduce the area of illuminated silicon.We discuss then about the validity of the electrical model for more recent technology nodes. Thus a new electrical model is developed for more recent CMOS bulk and Fully Depleted Silicon On Insulator (FDSOI) technologies. From its transistor structure, the CMOS FDSOI technology seems to be more resistant to laser injection than the CMOS bulk technology. This observation is confirmed by experimentation.Finally, we perform laser injection on a memory element (here a flip-flop chain). These experimentations show that even if the CMOS FDSOI technology seems to be more resistant, fault can be injected. With a one micro meter laser spot, the attacker can inject the wanted fault type in the flip-flop (bit set or bit reset) on 28nm CMOS bulk and FDSOI technologies. Even if, the fault injection is still possible, from the attacker point of view, fault injection is more difficult in a circuit using the CMOS 28nm FDSOI technology than the CMOS 28nm bulk one. Indeed, the gap between the fault injection threshold and the breaking threshold is narrower for the FDSOI than the bulk. Moreover, a breaking phenomenon has been observed in the FDSOI technology when multiple laser shot are performed in the same place.To conclude, the previous work allows updating and developed a new electrical model for the recent CMOS bulk and FDSOI technology under illumination, to compare those technologies against laser illumination. It comes out, that even if fault injection is possible for both technologies, the practical attack is more difficult to achieve on a CMOS FDSOI circuit.