Abstract
This work deals with security and flexibility issues for secure chips. We discuss first of cryptographic notions and then study two distinct problem. The first one, concerns cloning and reverse-engineering attacks. In this way, we make a proposition based on use of distributed reconfigurable logic and its associated secure reconfiguration protocol. The other problem concerns the side-channels analysis attacks. We evoke a countermeasure based on reconfiguration of data paths. This countermeasure is studied with different use and evaluated with different placing into chips.