Abstract
We report in this work the impact of the manufacturing process of an integrated circuit (28 nm technology node) on the porous dielectric material used to isolate the interconnections of the transistors. Our study focuses in particular on the diffusion of species (cleaning chemistries, water/moisture, gas molecules) in the porous network. To decorrelate "chemical" effects of affinity between the molecules and the surface and "physical" effects due to pore size, several complementary techniques are used for further characterization. Chemical changes are first characterized at the surface by XPS and drop contact angle. FTIR is then used to probe the whole thickness of the layer and the ToF-SIMS to obtain a depth profiled characterization. A microstructure analysis by solid-state NMR enables to highlight the changes in cross-linking of the silicon skeleton. A porosimetric study by EP, PALS and GISAXS reveals inconsistencies between these techniques based on the adsorption of gases on the one hand, and X-ray scattering and positron annihilation of the other. Numerical modeling of gas adsorption isotherms enables us to consider interactions probe surface and reconcile the results. Thus we measured an increase of the pore size by plasma etching, and a decrease in pore size after HF cleaning, which correspond to the characterized chemical changes in terms of size of the functional groups. Finally, these characterization techniques show that silylation treatments can effectively restore the dielectric and physico-chemical properties of low-k materials.