Logo image
Se connecter
Ultra Compact Non-Volatile Flip-Flop for Low-Power Digital Circuits Based on Hybrid CMOS/Magnetic Technology
Acte de colloque   Open Access

Ultra Compact Non-Volatile Flip-Flop for Low-Power Digital Circuits Based on Hybrid CMOS/Magnetic Technology

Gregory Di Pendina, Guillaune Prenat, Khouldoun Torki, Yoann Guillemenet et Lionel Torres
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011, Proceedings, Vol.LNCS(6951), pp.83-91
PATMOS 2011 - 21st International Workshop on Power and Timing Modeling, Optimization, and Simulation (Madrid, Spain, 26/09/2011–29/09/2011)
09/2011

Résumé

Non-volatile Latch Flip-Flop Magnetic Tunnel Junction Low Power Full Custom Design Digital Design Process Design Kit Standard Cell

Fichiers et liens (1)

url
Find in HALAfficher

Indicateurs

1 Consultations de la notice

Détails

Logo image