Logo image
Se connecter
Timing Performance Representation of a CMOS Standard Cell Library
Acte de colloque

Timing Performance Representation of a CMOS Standard Cell Library

Benoit Lasbouygues, J. Schindler, Sylvain Engels, Philippe Maurine, Xavier Michel, Nadine Azemard et Daniel Auvergne
18th International Conference on Design of Circuits and Integrated Systems, pp.83-88
DCIS: Design of Circuits and Integrated Systems (Ciudad Real, Spain, 19/11/2003–21/11/2003)
2003

Fichiers et liens (1)

url
Find in HALAfficher

Indicateurs

1 Consultations de la notice

Détails

Logo image