Laser-Induced Fault Effects in Security-Dedicated Circuits

Vincent Beroulle; Philippe Candelier; Stephan de Castro; Giorgio Di Natale; Jean-Max Dutertre; Marie-Lise Flottes; David Hely; Guillaume Hubert; Régis Leveugle; Feng Lu; Paolo Maistri; Athanasios Papadimitriou; Bruno Rouzeyre; Clement Tavernier; Pierre Vanhauwaert

doi:10.1007/978-3-319-25279-7_12

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Laser-Induced Fault Effects in Security-Dedicated Circuits

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Laser-Induced Fault Effects in Security-Dedicated Circuits

Vincent Beroulle, Philippe Candelier, Stephan de Castro, Giorgio Di Natale, Jean-Max Dutertre, Marie-Lise Flottes, David Hely, Guillaume Hubert, Régis Leveugle, Feng Lu, …

22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration - System on a Chip, Vol.AICT-464, pp.220-240

IFIP Advances in Information and Communication Technology

VLSI-SoC: Very Large Scale Integration and System-on-Chip (Playa del Carmen, Mexico, 06/10/2014–08/10/2014)

2015

DOI: https://doi.org/10.1007/978-3-319-25279-7_12

Résumé

Lasers

Security evaluation

Counter-measures

Fault attacks

Fault models

Hardware security

Lasers have become one of the most efficient means to attack secure integrated systems. Actual faults or errors induced in the system depend on many parameters, including the circuit technology and the laser characteristics. Understanding the physical effects is mandatory to correctly evaluate during the design flow the potential consequences of a laser-based attack and implement efficient counter-measures. This paper presents results obtained within the LIESSE project, aiming at defining a comprehensive approach for designers. Outcomes include the definition of fault/error models at several levels of abstraction, specific CAD tools using these models and new counter-measures well-suited to thwart laser-based attacks. Actual measures on components manufactured in the new 28 nm FDSOI technology are also presented.

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Détails

Titre: Laser-Induced Fault Effects in Security-Dedicated Circuits
Créateurs - sans rôle: Vincent Beroulle - Université Grenoble Alpes
Philippe Candelier - STMicroelectronics (France)
Stephan de Castro - Université de Montpellier
Giorgio Di Natale - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
Jean-Max Dutertre - Mines Saint-Étienne
Marie-Lise Flottes - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
David Hely - Université Grenoble Alpes
Guillaume Hubert - Office National d'Études et de Recherches Aérospatiales
Régis Leveugle - Université Grenoble Alpes
Feng Lu - Université de Montpellier, BotAnique et Modélisation de l'Architecture des Plantes et des végétations - AMAP
Paolo Maistri - Techniques of Informatics and Microelectronics for Integrated Systems Architecture
Athanasios Papadimitriou - Université Grenoble Alpes
Bruno Rouzeyre - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
Clement Tavernier - STMicroelectronics (France)
Pierre Vanhauwaert - Techniques of Informatics and Microelectronics for Integrated Systems Architecture
Contributeurs - sans rôle: Luc Claesen
Maria-Teresa Sanz-Pascual
Ricardo Reis
Arturo Sarmiento-Reyes
Détails de publication: 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration - System on a Chip, Vol.AICT-464, pp.220-240
Colloque: VLSI-SoC: Very Large Scale Integration and System-on-Chip (Playa del Carmen, Mexico, 06/10/2014–08/10/2014)
Publications en série: IFIP Advances in Information and Communication Technology
Identifiants: 9945045809311
Unité académique: Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier - LIRMM; BotAnique et Modélisation de l'Architecture des Plantes et des végétations - AMAP
Langue: English
Type de ressource: Conference proceeding
Champs locaux: hal-01383737