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Impact of gate current noise on drain current noise in 90 nm CMOS technology
Acte de colloque

Impact of gate current noise on drain current noise in 90 nm CMOS technology

M. Valenza, A. Laigle, Frédéric Martinez, A. Hoffmann et D. Rigaud
33rd European Solid-State Device Research - ESSDERC '03, pp.287-290
33rd European Solid-State Device Research - ESSDERC '03 (Estoril, France, 2003)

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