High Performance SoC Design Using Magnetic Logic and Memory

Yahya Lakys; Jacques-Olivier Klein; Daniel Etiemble; Dafiné Ravelosona; Claude Chappert; Weisheng Zhao; Lionel Torres; Luís Vitório Cargnini; Raphael Martins Brum; Yue Zhang; Yoann Guillemenet; Gilles Sassatelli

doi:10.1007/978-3-642-32770-4_2

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High Performance SoC Design Using Magnetic Logic and Memory

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High Performance SoC Design Using Magnetic Logic and Memory

Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, Dafiné Ravelosona, Claude Chappert, Weisheng Zhao, Lionel Torres, Luís Vitório Cargnini, Raphael Martins Brum, Yue Zhang, …

19th International Conference on Very Large Scale Integration, Vol.IFIPAICT-379, pp.10-33

VLSI-SoC: Advanced Research for Systems on Chip

VLSI-SoC: Very Large Scale Integration - System-on-Chip (Hong Kong, China, 03/10/2011–05/10/2011)

2012

DOI: https://doi.org/10.1007/978-3-642-32770-4_2

Résumé

MRAM

Non-volatile CPU

Magnetic Logic

Reconfigurable logic

As the technolody node shrinks down to 90nm and below, high standby power becomes one of the major critical issues for CMOS highspeed computing circuits (e.g. logic and cache memory) due to the high leakage currents. A number of non-volatile storage technologies, such as FRAM, MRAM, PCRAM and RRAM, are under investigation to bring the non-volatility into the logic circuits and then eliminate completely the standby power issue. Thanks to its infinite endurance, high switching/sensing speed and easy integration on top of CMOS process, MRAM is considered as the most promising one. Numerous logic circuits based on MRAM technology have been proposed and prototyped in the last years. In this paper, we present an overview and current status of these logic circuits and discuss their potential applications in the future from both physical and architectural points of view.

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Détails

Titre: High Performance SoC Design Using Magnetic Logic and Memory
Créateurs - sans rôle: Yahya Lakys - Institut d'Electronique Fondamentale
Jacques-Olivier Klein - Institut d'Electronique Fondamentale
Daniel Etiemble - Laboratoire de Recherche en Informatique
Dafiné Ravelosona - Institut d'Electronique Fondamentale
Claude Chappert - Institut d'Electronique Fondamentale
Weisheng Zhao - Institut d'Electronique Fondamentale
Lionel Torres - Conception et Test de Systèmes MICroélectroniques
Luís Vitório Cargnini - Conception et Test de Systèmes MICroélectroniques
Raphael Martins Brum - Conception et Test de Systèmes MICroélectroniques
Yue Zhang - Institut d'Electronique Fondamentale
Yoann Guillemenet - Conception et Test de Systèmes MICroélectroniques
Gilles Sassatelli - Conception et Test de Systèmes MICroélectroniques
Contributeurs - sans rôle: Salvador Mir
Chi-Ying Tsui
Ricardo Reis
Oliver C. S. Choy
Détails de publication: 19th International Conference on Very Large Scale Integration, Vol.IFIPAICT-379, pp.10-33
Colloque: VLSI-SoC: Very Large Scale Integration - System-on-Chip (Hong Kong, China, 03/10/2011–05/10/2011)
Publications en série: VLSI-SoC: Advanced Research for Systems on Chip
Identifiants: 9947041609311
Unité académique: Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier - LIRMM
Langue: English
Type de ressource: Conference proceeding
Champs locaux: hal-01519767