Résumé
To tackle the key issues of monolithic heterogeneous integration, fast yet low power processing, high integration density, fast yet low power storage, the goal of the GREAT project is to co-integrate multiple functions like sensors (“Sensing”), RF receivers (“Communicating”) and logic/memory (“Processing/Storing”) together within CMOS by adapting the STT-MTJs (Magnetic devices) to a single baseline technology enabling logic, memory, and analog functions in the same System-on-Chip (SoC) as the enabling technology platform for Internet of Things (IoT). This will lead to a unique STT-MTJ cell technology called Multifunctional Standardized Stack (MSS). The major outputs of GREAT are the technology and the architecture platform for IoT SoCs providing better integration of embedded & mobile communication systems and a significant decrease of their power consumption. Based on the STT-MTJs (now viewed as the most suitable technology for digital applications and with a huge potential for analog subsystems) unique set of performances (non-volatility, high speed, infinite endurance and moderate read/write power), GREAT will achieve the same goal as heterogeneous integration of devices but in a much simpler way since the MSS will enable different functions using the same technology.Published in: VLSI (ISVLSI), 2017 IEEE Computer Society Annual Symposium onDate of Conference: 3-5 July 2017