Résumé
Negative Group Delay (NGD) remains a little-known concept in embedded digital signal processing, and most electronic designers are unfamiliar with its design and analysis. This paper presents a clear, step-by-step theoretical framework and a practical methodology for implementing baseband NGD using a low-order finite impulse response (FIR) filter. All FIRbased NGD parameters and characteristics can be defined under specific conditions based solely on the desired NGD value and the sampling frequency. Our synthesis results confirm that the realized time-advance increases with normalized frequency. We validate the approach through simulation and then demonstrate a proof-of-concept FPGA implementation. In transient experiments using a 3 kHz Gaussian pulse, the NGD circuit produces an advance of approximately 13 µs relative to the input signal and the NGD execution time is about 2µs.