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“Analogue Network of Converters”: A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC
Acte de colloque   Open Access

“Analogue Network of Converters”: A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC

Florence Azaïs, Serge Bernard, Philippe Cauvet, Mariane Comte, Vincent Kerzérho et Michel Renovell
11th IEEE European Test Symposium, pp.159-164
ETS: European Test Symposium (Southampton, United Kingdom, 21/05/2006–24/05/2006)
22/05/2006

Résumé

In this paper, complex mixed signal circuits such as SiP or SOC including several ADCs and DACs are considered. A new DFT technique is proposed allowing the test of this complete set of embedded ADCs and DACs in a fully digital way such that only a simple low cost tester can be used. Moreover, this technique called “Analogue Network of Converters” (ANC) requires an extremely simple additional circuitry and interconnect

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