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An efficient hybrid power modeling approach for accurate gate-level power estimation
Acte de colloque   Open Access

An efficient hybrid power modeling approach for accurate gate-level power estimation

Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard et Cyril Chevalier
27th International Conference on Microelectronics, pp.17-20
ICM: International Conference on Microelectronics (Casablanca, Morocco, 20/12/2015–23/12/2015)
2015

Résumé

FDSOI Technology Hybrid Power Model Library Characterization Power Estimation Technique
This paper presents a hybrid power modeling approach based on an efficient library characterization methodology and an effective power estimation flow to accurately assess gate-level power consumption in a faster way. As a case study, we apply the proposed approach on 28nm Fully-Depleted Silicon On Insulator technology. Index Terms—FDSOI Technology, Hybrid Power Model, Library Characterization, Power Estimation Technique.

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