Résumé
Fault Attacks methods like Electro-Magnetic PulseInjection or Body Biasing Injection have recently been demon-strated to be efficient against smartcards and Systems on Chip. As of now, security is a main constraint in product development, even for low-cost products riding the trend of the IoT (mostof these devices operate in hostile environments). Unfortunately, the implementation of hardware countermeasures has a costin silicon area, design time and performance. Therefore, it isimportant to develop protections while taking into account theircosts and easyness of implementation. One way to achieve theseends would be to have an all-in-one fully digital detector whoseintegration is compliant with the standard cell design flow. Inthis perspective, we propose an enhanced sensor to detect severaltypes of attacks by exploiting analog phenomena induced at thegate level, instead of the attack itself. This paper describes thedesign and the implementation into FPGAs of this sensor, as wellas experimental tests demonstrating its effectiveness for detectingelectro-magnetic and body bias fault injection attempts.