A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults

Rodrigo Possamai Bastos; Frank Sill Torres; Jean-Max Dutertre; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre

doi:10.1109/PATMOS.2013.6662169

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A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults

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A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults

Rodrigo Possamai Bastos, Frank Sill Torres, Jean-Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale et Bruno Rouzeyre

23rd International Workshop on Power and Timing Modeling, Optimization and Simulation, pp.157-163

PATMOS: Power and Timing Modeling, Optimization and Simulation (Karlsruhe, Germany, 09/09/2013–11/09/2013)

09/09/2013

DOI: https://doi.org/10.1109/PATMOS.2013.6662169

Résumé

Transient faults

Built-in current sensors

Concurrent detection

Fault attacks

Fault tolerance

Security

Soft errors

This work proposes a novel built-in current sensor for detecting transient faults of short and long duration as well as multiple faults in combinational and sequential logic. Unlike prior similar strategies, which are formed by pairs of PMOS and NMOS sensors, the proposed scheme is a single sensor connected to PMOS and NMOS bulks of the monitored logic. In comparison with existing transient-fault mitigation techniques, the paper presents very competitive results that indicate no performance penalty, and overheads of only 26 % in power consumption and 23 % in area.

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Détails

Titre: A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults
Créateurs - sans rôle: Rodrigo Possamai Bastos - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés
Frank Sill Torres - Departamento de Engenharia Elétrica [Minas Gerais]
Jean-Max Dutertre - Centre Microélectronique de Provence - Site Georges Charpak (CMP-GC)
Marie-Lise Flottes - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
Giorgio Di Natale - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
Bruno Rouzeyre - Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier
Détails de publication: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation, pp.157-163
Colloque: PATMOS: Power and Timing Modeling, Optimization and Simulation (Karlsruhe, Germany, 09/09/2013–11/09/2013)
Identifiants: 9935843609311
Unité académique: Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier - LIRMM
Langue: English
Type de ressource: Conference proceeding
Champs locaux: lirmm-00968621