A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression

Wesley Grignani; Douglas Santos; Luigi Dilillo; Felipe Viel; Douglas Melo

doi:10.1109/DFT59622.2023.10313567

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A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression

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A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression

Wesley Grignani, Douglas Santos, Luigi Dilillo, Felipe Viel et Douglas Melo

DFT 2023 - 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, pp.1-6

DFT 2023 - 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (Juan-les-Pins, France, 03/10/2023–06/10/2023)

14/11/2023

DOI: https://doi.org/10.1109/DFT59622.2023.10313567

Résumé

Systems-on-Chip

Hardware Accelerators

Image Processing

Hyperspectral Images

CCSDS 123.0-B-2

Several remote sensing applications that collect specific data in the space environment use images capable of providing a large volume of information, known as hyperspectral images. Given the amount of data, one of the most critical issues in applications that use hyperspectral images is the demanded for compression, which also affects restrictions on the storage capacity and processing in space applications. This work aimed to implement hyperspectral image compressors, considering the standard by the CCSDS (Consultative Committee for Space Data Systems). The solutions were implemented using a High-Level Synthesis tool (HLS) and a manual description in a Hardware Description Language (HDL). Results show that, compared to the software solution, the HLS and the HDL implementation accelerated the application by 1.6× and 4×, respectively. For images up to 512 spectral bands, the HLS solution presented a throughput of 9.11 MSa/s, while the HDL solution can process 21.47 MSa/s, which meets the real-time requirements of the standard. The HDL solution uses about 3× fewer LUTs (Look-Up Tables) LUTs and 8× fewer FFs (Flip-Flops) than the HLS implementation. Due to the low cost observed in the results, we intend to harden the accelerator and integrate it into a future multi-core satellite system.

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Titre: A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression
Créateurs - sans rôle: Wesley Grignani - Universidade do Vale do Itajaí
Douglas Santos - Université de Montpellier, Institut d'Electronique et des Systèmes - IES
Luigi Dilillo - Université de Montpellier, Institut d'Electronique et des Systèmes - IES
Felipe Viel - Universidade do Vale do Itajaí
Douglas Melo - Universidade do Vale do Itajaí
Détails de publication: DFT 2023 - 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, pp.1-6
Colloque: DFT 2023 - 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (Juan-les-Pins, France, 03/10/2023–06/10/2023)
Identifiants: 9941141209311
Unité académique: Institut d'Electronique et des Systèmes - IES
Langue: English
Type de ressource: Conference proceeding
Champs locaux: hal-04266881