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On-Chip Generator of a Saw-Tooth Test Stimulus for ADC BIST
Book chapter   Open access

On-Chip Generator of a Saw-Tooth Test Stimulus for ADC BIST

Florence Azaïs, Serge Bernard, Yves Bertrand and Michel Renovell
SOC Design Methodologies, Vol.90, pp.425-436
IFIP — The International Federation for Information Processing
2002

Abstract

ADC testing BIST analog stimulus generation
In the context of analog BIST for A-to-D converters, this paper presents an implementation of an on-chip ramp generator. It is demonstrated that the proposed original adaptive scheme allows the internal generation of a highly saw-tooth signal with a very precise control of the signal amplitude. In addition, the implementation of the adaptive ramp generator exhibits a very low silicon area.
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